CS 2734
Computer Organization II
Lecture 23: Microinstruction Timing and Control
- 3/10/97
Read pages 170-178 (Section 4.2) of Tanenbaum
- Data path of Figure 4-8 has 61 signals:
- Loading of A bus (16).
- Loading of B bus (16).
- Loading of C bus (16).
- Control A and B latches (2).
- Control ALU (2).
- Control shifter (2).
- Control the MAR and MBR (4).
- Control memory read/write (2).
- Control AMUX (1).
- Look at the complete diagram of microarchitecture (Figure 4-10).
- Microinstruction sequencing.
SKILL: You should understand what control signals
are needed to drive the data path of Figure 4-8.
Revision Date: 3/10/97