CS 2734 Computer Organization II

Lecture 22: Basic Hardware Components Continued - 3/7/97

registers and latches provide memory. (See Figure 3-26)
- The building block for these components might be the D flip flop where D is the input and Q is the output:
  - Figure 3-26a: D is loaded when the clock is 1 (latch)
  - Figure 3-26b: D is loaded when the clock is 0 (latch)
  - Figure 3-26c: D is loaded on the rising edge of clock (flip-flop)
  - Figure 3-26d: D is loaded on the falling edge of clock (flip-flop)
- To understand how a D flip flop might be built, look at Figure 3-23 of Tanenbaum:
  - When S and R are both 0, the outputs stay at what they are.
  - When S is set to 1 and R is set to 0, Q is 1.
  - When S is set to 0 and R is set to 1, Q is 0.
  - When S and R are both 1, both Q and its complement are 0-- we don't want that to happen.
  Put a driver with a clock to make sure that they both aren't 1. A D latch is shown in Figure 3-25. (Figure 3-27 and Figure 3-28 show how these might be packaged in a chip.)
- The functional diagram of a register is shown in Figure 4-2.
Other components - look at the functional diagram of:
- ALU and shifter (Figure 4-4).
- Clock used in the machine (Figure 4-5).
- MAR and MBR (Figure 4-6).
Discuss what control signals are needed to perform the instruction cycle (Figure 4-8).

SKILL: You should have a basic understanding of the functional behavior of registers and begin to understand what control signals must be furnished to drive the data path of Figure 4-8.

Revision Date: 3/10/97