CS 2734
Computer Organization II
Lecture 14: Instruction Encoding on the Sparc
- 2/17/97
Read Paul p. 211-224 (Chapter 8)
In this lecture we will start to examine
the decoding part of the instruction cycle.
- Sparc instructions are encoded in four possible forms:
| Opcode | Instruction Group |
|---|
| 00 | Branch instructions |
| 01 | call instruction |
| 10 | Format three instructions |
| 11 | Format three instructions |
- We will be referring to Paul during this lecture, so
please bring your book.
- Register encoding:
| Registers | Encoding (5 bit) |
|---|
| %g0 through %g7 |
0 through 7 |
| %o0 through %o7 |
8 through 15 |
| %l0 through %l7 |
16 through 23 |
| %i0 through %i7 |
24 through 31 |
- Format three encoding:
| Opcode | Operation |
|---|
| 000000 | add |
| 000001 | and |
| 000010 | or |
| 000011 | xor |
| 000100 | sub |
| 000101 | andn |
| 000110 | orn |
| 000111 | xnor |
- The x version has bit 3 set.
- The cc version has bit 4 set.
- The xcc version has bits 3 and 4 set.
- Encoding of call.
- Encoding of branch instructions.
- Encoding of format two instructions
(sethi and or).
SKILL: You should be able to encode format 3
instructions into hexadecimal.
Revision Date: 2/17/97